The following diagram follows the entire path of the Scanning Interface Unit (SIU) v1.1 PHA Input circuit.

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Notes:

• Scanning Interface Rev 1.1 is printed on the card inside the SIU.
• The circuit shown is inside the SIU.
• The analog PHA Input pulse from the pulse processor enters the SIU rear-panel through its own BNC connector.
• The op-amp circuits add gain and offset.
• Some 1.1 boards have the multiplexer U1 pins 6-7 and 2-3 shorted. Other boards have the multiplexer U1 removed and U1 socket pins 6-7 and 2-3 shorted. On such boards, the output of U8 is effectively connected directly to R33.
• Some boards have the output amplifier modified to invert the pulse (shown in blue below). The steps to invert the pulse circuitry are these:
  • cut U8 trace 6-7
  • cut U8 trace 1-5
  • cut U8 trace 6-multiplexer (or 6-R33 in case of shorted or missing multiplexer)
  • jumper U8 5 to ground
  • insert 1K resistor U8 6-7 (back side of board)
  • insert 1K resistor U8 6-1 (back side of board)
  • jumper U8 7 to multiplexer pin 3/6 (or R33 in case of shorted or missing multiplexer)